The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a resistor element made of polycrystalline silicon on a field insulating film formed on a major surface of a semiconductor substrate and a method of manufacturing the resistor element.
Normally, a resistance R and a sheet resistance R.sub.s of a resistor element are determined by a width W, a length L, a thickness t and a specific resistance .rho. of the resistor element and represented by the following formulae: ##EQU1##
Therefore, the following three methods are conceived to obtain a resistor element having a high resistance.
According to a first method, a plan configuration, that is, a width and a length of a resistor element are designed so as to obtain a high resistance. In this method, while a width W of a resistor element can be made small up to a lower limit of a resolution of a photo-resist process, there are shortcomings that if design close to the lower limit is effected, fluctuations of the manufacturing conditions would become large and hence resistor elements having a stable resistance cannot be obtained. On the other hand, if a resistor element is formed by making a length L of the resistor element large, a degree of integration cannot be raised.
According to a second method, a specific resistance of a resistor element is raised. However, a semiconductor layer normally used in a semiconductor device for forming a resistor element is used at the other portions of the device as wirings, gate electrodes, etc., and in view of the objects of use of these portions it is desirable to reduce the specific resistance as low as possible. Accordingly, in order to raise the specific resistance of the resistor element per se, it is necessary to add a manufacturing step of process for forming only the resistor element. However, an addition of a manufacturing step of process is associated with shortcomings that it brings about rise of the cost, also defects are liable to occur and hence the yield is lowered.
According to a third method, a resistor element having high resistance can be formed by thinning a thickness of a semiconductor layer which makes the resistor element. However, when apertures for leading out electrodes are opened in an inter-layer insulating film or an upper insulating film formed above the resistor element, etching would be effected up to the silicon layer of the resistor element, resulting in formation of apertures in the layer. This becomes an issue especially when a reactive ion etching process in which anisotropic etching is possible, is employed for micro-fine patterning. Therefore, thinning of the thickness of the silicon layer of the resistor element is subjected to certain limitation.
In more particular, when a polycrystalline silicon is used, in the case of a film thickness of 2000 .ANG. or smaller, possibly apertures would be opened also in the contact sections of this resistor element in the above-mentioned step of process, although it may depend upon reaction conditions of the etching. Hence, contact structures having a poor reliability would result. Namely, when the apertures are formed in a silicon oxide film, for example, above the contact sections of the polycrystalline silicon resistor by the anisotropic reactive ion etching, CF.sub.4 and H.sub.2 gases are employed under the condition of 4 to 8 Pa (pascal) pressure. In this case, the etching rate of thermal silicon oxide is 200 to 300 .ANG./min., the rate of CVD silicon oxide is 400 to 500 .ANG./min. and the rate of polycrystalline silicon is 100 to 150 .ANG./min. The deviation of the respective etching rate becomes 20 to 40% in a reactor chamber. In view of such a small ratio of the etching rates of silicon oxide and polycrystalline silicon and of the deviation in the chamber, it is impossible to obtain a reliable contact structure when the polycrystalline silicon has a thin thickness in its contact sections.
In practice, in order to obtain contact structures having a sufficient reliability through the above-mentioned method, a film thickness of 5000 .ANG. or larger is necessitated. On the other hand, it is not practical to use the method in which a thick polycrystalline silicon layer such as, for example, of a layer of 6000 to 8000 .ANG. in thickness is formed and in which only the central section serving as a resistor section is etched except for the contact sections.
More particularly, in this case, in order to form a resistor section of 2000 .ANG. in thickness, a thickness that is as thick as 4000 to 6000 .ANG. must be removed by etching. However, if a resistor section having a small film thickness is produced by such a etching method, a uniformity within the resistor section would become very poor. Deviations in the film thickness of the resistor sections among the respective pellets or wafers would also become very large. In addition, in the case of employing such method, a long etching time is necessitated.
An etching amount of such extent that the above-mentioned uniformity and deviations would not become an issue, is 2000 .ANG. at the maximum. Taking the above-mentioned problems into consideration, in the prior art it was impossible to manufacture a resistor element having a film thickness of 2000 .ANG. or smaller with a good reliability.